How inclusive and exclusive caches determine unique resident capacity

Adding two cache capacities does not tell us how many distinct memory lines they can retain together. Some lines can be present at both levels, while another hierarchy can deliberately keep the levels' data sets separate.

inclusive and exclusive caches define relationships between resident sets. Those relationships affect unique capacity and the work required when fills or evictions change a set.

The examples use two hypothetical levels with equal-sized lines. The fill traces use clean data so inclusion can be examined separately from dirty-data preservation. They do not identify a particular processor's organization or rank products by performance.

Count unique data in a cache hierarchy

Call the upper-level resident-line set U and the lower-level set L. The unique lines retained across both levels are their union. Its size is the size of U plus the size of L minus the size of their intersection.

Give U capacity for two lines and L capacity for four. For the examples, both are initially full. Use letters a, b, c and so on as distinct line identities, not values stored within one line.

If U contains a and b while L contains a, b, c and d, their union has four lines. The two upper copies duplicate line identities already represented below. Summing the six resident copies would overcount unique coverage.

If U contains a and b while L contains c, d, e and f, their union has six lines. The disjoint sets retain six distinct identities under these assumptions.

For a byte illustration, stipulate sixty-four bytes of payload per line at both levels. The advertised payload capacities are 128 and 256 bytes. Their sum is 384 bytes of copies, but the first arrangement covers only 256 unique payload bytes.

This account concerns resident data payload. Tags, metadata and unused capacity have separate roles. The set union is not a measurement of total storage implementation cost.

Inclusive residency requires an upper-set subset

In the inclusive model, every valid upper-level line identity must also be resident in the lower data set. In symbols, U is a subset of L at the settled states considered here.

With two upper lines and four lower lines fully occupied, the union therefore has four line identities. The upper capacity can provide a useful nearer copy without increasing this model's maximum unique resident coverage beyond the lower set.

Inclusion constrains resident-line identities. It does not, by itself, define access latency, which level supplies every operation, or the exact state of a write-modified copy.

The pipeline backpressure guide provides a resource-ledger comparison for a cache hierarchy. It counts work retained in queues, workers and outputs because one queue boundary does not describe the whole pipeline. Here every level's resident copies likewise need an account, followed by the union that counts each distinct line identity once. A queue ledger does not specify processor residency policy; the set relationship here does.

Actual systems can define inclusion for a particular scope and collection of caches. The two-level model assumes exactly the sets U and L named here. A claim about another scope needs its own resident-set relationship.

Trace an upper fill in the inclusive model

Begin with U equal to {a,b} and L equal to {a,b,c,d}. The upper level wants to fill new line e. Because U is full, stipulate that it removes b from U before its settled new state is {a,e}.

Line e must also become resident in L. Stipulate that the lower fill removes c, leaving L equal to {a,b,d,e}. The final upper set is still a subset of the final lower set. Removing b from U did not require removing b from L under inclusion. The relationship permits lower-only lines. The chosen lower victim c was not currently in U, so this particular lower replacement did not need to invalidate an upper c copy.

The transition mechanism must establish the required lower residency before treating the resulting upper copy as valid under the model. A successful upper fill label cannot supply that residency evidence by itself.

These are stipulated victims used to trace the inclusion rule, not a comparison of replacement policies. Another selected victim can change which extra actions are required.

How back invalidation follows a lower eviction

Use the original sets again: U is {a,b} and L is {a,b,c,d}. Now let L evict a to admit e. Keeping a valid in U would violate inclusion because a no longer belongs to L.

The model must invalidate U's a copy as part of the required transition. A permitted settled outcome is U equal to {b} and L equal to {b,c,d,e}. This upward consequence of a lower eviction is the back-invalidation relationship. The invalidation can remove a line the upper level would otherwise have retained. The lower residency constraint, rather than only the upper level's own capacity, caused that loss.

The DMA guide gives a useful preservation comparison for back invalidation. Its shared-line example distinguishes discarding a stale buffer copy from preserving a dirty neighbouring CPU value; treating a whole line as one action can otherwise lose required data. Our inclusive example stipulates clean lines, so removing U's permission for a supplies the required residency repair. A real dirty upper copy would need its own current-data preservation rule. The DMA guide does not define inclusion between U and L.

Each invalidation has its own trigger. Coherence can remove another cache's copy for write ownership, while this inclusive trace removes an upper copy because its required lower residency ended. The shared word invalidation does not make the surrounding contracts identical.

An impossible settled row would be U equal to {a,b} with L equal to {b,c,d,e} under the declared inclusive rule. The set comparison rejects it regardless of whether both levels report their own replacement as complete.

Exclusive residency avoids duplicate data sets

In the exclusive model, U and L have no common resident-line identity in the stipulated stable state. Use U equal to {a,b} and L equal to {c,d,e,f}, giving six unique lines.

Suppose the upper level wants c, currently held below. Under one stipulated exclusive transition, c moves into U and an upper victim b moves into L. The final sets are U equal to {a,c} and L equal to {b,d,e,f}. The union remains {a,b,c,d,e,f}, and the intersection remains empty. Copying c upward while retaining its lower data copy would violate the specified exclusivity unless another transition removed that duplication before the stable state.

The particular exchange rule is illustrative. Exclusivity itself says what set relationship the result must satisfy; a real design needs mechanisms and temporary-state rules that establish it.

The nominal sum can equal maximum unique payload coverage in this full, disjoint example. That does not prove better application performance or that the same relationship holds whenever a level is partially occupied.

Noninclusive does not automatically mean exclusive

A noninclusive model does not require every upper data line to remain in the lower data set. Without a subset requirement, the sets may still overlap unless another rule requires disjointness.

For example, let U equal {a,b} and L equal {b,c,d,e}. The intersection contains b, and the union contains five identities. The hierarchy has neither the inclusive example's four-line union nor the exclusive example's six-line union.

Under the sixty-four-byte example, this five-line union covers 320 unique payload bytes. The inclusive full-set case covers 256 bytes and the exclusive case 384, despite the same 128-byte upper and 256-byte lower advertised capacities. The overlap explains the different totals; no measured latency or application speed follows from these numbers.

The combined unique capacity depends on the actual overlap under the selected policy. Calling a hierarchy noninclusive without specifying exclusivity cannot justify automatically adding its capacities as unique data.

Likewise, the permitted response to lower eviction depends on whatever other contracts the model imposes. Lack of data inclusion alone does not describe every coherence or directory requirement.

Separate data inclusion from tag or directory coverage

Add a directory set T that records which lines may be present above. Suppose T covers all of U, while lower data set L does not. The directory can have an entry describing a without holding a's data payload in L.

The relationship U subset of T is then a metadata coverage claim. It is not U subset of L. Counting the directory entry as another full resident data line would mix different kinds of storage. A system could need that coverage to find relevant copies or enforce another stated protocol. The directory's purpose and admission rules require their own definition; the current unique-data calculation still uses U and L.

A specification should therefore say whether an inclusion claim concerns payload residency, tags, a directory or another named scope. A generic inclusive label can otherwise invite an unsupported capacity conclusion.

Verify the resident relationships after each change

Preserve each level's capacities and resident identities, then calculate the union and intersection. For inclusive settled states, check the subset relation. For exclusive states, check that the intersection is empty.

Trace the actual fills and evictions under the chosen model. A lower eviction of a required upper line must not leave the forbidden inclusive state, even if the upper line still occupies physical bits in an invalid copy.

Keep metadata coverage separate from data residency, and distinguish the clean example from any additional dirty-data obligations. None of those statements can be inferred solely from advertised byte counts.

Keep the resident-set rows alongside their union calculation using the Lenovo IdeaPad touch laptop with a 15.6-inch FHD screen. A 512GB PCIe SSD appears in its native product description together with 16GB DDR4 and an i5-1334U processor. Save U and L before choosing a victim, then retain their settled successor sets. That record exposes the forbidden upper a left behind after lower a is evicted. The catalogue does not identify an actual chip's inclusion rules.

For comparing payload coverage with directory coverage, the ASUS Vivobook 14 FHD laptop is listed with 16GB DDR4 memory and a Core 5 120U processor. Keep directory T in a separate column from lower data L. An entry for a can cover an upper copy without providing a's payload below. The computing workspace helps inspect that distinction; its listed specifications cannot verify the hypothetical set relationships.